For processing semiconductors, hundreds of steps will be taken on the center region to form a device area. This area includes many basic units, such as MOS structures. The edge area of wafer is not concerned and raw materials of processing are left on it. This leftover does not affect performance of the units. During high temperature reaction, however, it is transformed into other material which has different thermal expansion coefficient from dielectric materials under it. During thermal treat process, it causes peeling phenomenon on the edge area of wafer and contaminates the whole system.
For example, in tungsten plug manufacturing process, dielectric layer and polysilicon layer which is over the dielectric layer are left on edge area of wafer. Titanic film is deposited over the polysilicon layer as glue layer. Titanium nitride (TiN) film is formed by rapid thermal nitridation (RTN) procedure, but titanic film and polysilicon layer will react to form titanium silicide (TiSi.sub.2) film simultaneously. Titanium silicide film has much different thermal expansion coefficient from dielectric layer, so titanium silicide film and titanic film will peel off dielectric layer on edge area of wafer during thermal treat process. These contaminants trouble manufacturers very much.
Polysilicon layer is left on edge area of wafer because of the use of etcher with clamps. Etching process is hampered by these clamps and a width of 2 mm polysilicon can not be etched. It is useful to employ clampless etchers in factory. But this idea does not work in practice because that it costs too much to restock new equipments. Rearranging equipments is neither suitable because of complexity of semiconductor processing.